1. Field of the Invention
The present invention relates to a semiconductor package having a semiconductor constructing body and a method of manufacturing the same.
2. Description of the Related Art
In recent years, semiconductor packages called CSPs (Chip Size Packages) have been developed as electronic devices represented by cellular phones reduce their sizes. In a CSP, for example, a passivation film (insulating film) is formed on the upper surface of a semiconductor substrate having an integrated circuit and a plurality of connection pads for external connection. Opening portions are formed in the passivation film in correspondence with the connection pads. Interconnections to be connected to the connection pads through the opening portions are formed. An external connection electrode made of, e.g., a columnar electrode is formed on the side of the other end portion of each interconnection. The space between the external connection electrodes is filled with a sealing material.
According to this CSP, for example, when solder balls are formed on the external connection electrodes, the device can be bonded to a circuit board with connection terminals by the face-down method. The mounting area can be almost the same as the size of the bare semiconductor package. The CSP can therefore greatly decrease the sizes of electronic devices as compared to the conventional face-up bonding method using wire bonding.
The conventional semiconductor package raises the following problems when the number of connection pads increases as the degree of integration becomes higher. As described above, a CSP normally has external connection electrodes arrayed in a matrix on the upper surface of a semiconductor substrate. When this array is used for a semiconductor substrate having many external connection electrodes, the size and pitch of the external connection electrodes become small. Because of this disadvantage, the CSP technology can hardly be applied to devices which have a large number of external connection electrodes relative to the size of the semiconductor substrate. More specifically, if the external connection electrodes have small size and pitch, alignment for connection to the circuit board becomes difficult, and the cost of connection to the circuit board increases. There are also problems that decrease the reliability, including a low bonding strength, a high probability of short circuit between electrodes in bonding, and a high probability of external connection electrode destruction which is caused by stress generated by the difference in coefficient of linear expansion between the semiconductor substrate and the circuit board.
In the conventional semiconductor package, as described above, the device can be bonded to a circuit board by the face-down method, and the mounting area can be almost the same as the size of the semiconductor substrate. For these reasons, the sizes of electronic devices can greatly be reduced as compared to the conventional face-up bonding method using wire bonding. However, even this method has a limitation on size reduction. More specifically, when other necessary circuit elements such as an inductor circuit element and antenna circuit element are formed on the circuit board, and the conventional semiconductor substrate is connected to these circuit elements to obtain a desired circuit function, the semiconductor substrate and circuit elements are arranged two-dimensionally. Hence, size reduction is limited. In addition, since these components are arranged two-dimensionally, the wiring length increases. This may increase the impedance (stray capacitance or the like), resulting in degradation in circuit characteristics.